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c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . d d r 2 a n d d d r 3 p o w e r s o l u t i o n s y n c h r o n o u s b u c k c o n t r o l l e r w i t h 1 . 5 a l d o f e a t u r e s g e n e r a l d e s c r i p t i o n b u c k c o n t r o l l e r ( v d d q ) h i g h i n p u t v o l t a g e s r a n g e f r o m 3 v t o 2 8 v i n p u t p o w e r provide 1.8v (ddr2), 1.5v (ddr3) or adjustable output voltage from 0.75v to 5.5v - 1% accuracy over-temperature i n t e g r a t e d m o s f e t d r i v e r s a n d b o o t s t r a p d i o d e e x c e l l e n t l i n e a n d l o a d t r a n s i e n t r e s p o n s e s p f m m o d e f o r i n c r e a s e d l i g h t l o a d e f f i c i e n c y c o n s t a n t - o n - t i m e c o n t r o l l e r s c h e m e - s w i t c h i n g f r e q u e n c y c o m p e n s a t i o n f o r p w m m o d e - a d j u s t a b l e s w i t c h i n g f r e q u e n c y f r o m 1 0 0 k h z t o 5 5 0 k h z i n p w m m o d e w i t h d c o u t p u t c u r r e n t i n t e g r a t e d m o s f e t d r i v e r s a n d b o o t s t r a p d i o d e s 3 a n d s 5 p i n s c o n t r o l t h e d e v i c e i n s 0 , s 3 , o r s 4 / s 5 s t a t e p o w e r g o o d m o n i t o r i n g 7 0 % u n d e r - v o l t a g e p r o t e c t i o n ( u v p ) 1 2 5 % o v e r - v o l t a g e p r o t e c t i o n ( o v p ) a d j u s t a b l e c u r r e n t - l i m i t p r o t e c t i o n - u s i n g s e n s e l o w - s i d e m o s f e t r d s ( o n ) 1.5a ldo section (vtt) s o u r i n g o r s i n k i n g c u r r e n t u p t o 1 . 5 a f a s t t r a n s i e n t r e s p o n s e f o r o u t p u t v o l t a g e output ceramic capacitors support at least 10 m f mlcc v t t a n d v t t r e f t r a c k a t h a l f t h e v d d q s n s b y i n t e r n a l d i v i d e r 20mv accuracy for vtt and vttref i n d e p e n d e n t o v e r - c u r r e n t - l i m i t ( o c l ) t h e r m a l s h u t d o w n p r o t e c t i o n q f n - 2 4 4 m m x 4 m m t h i n p a c k a g e ( t q f n 4 x 4 - 2 4 a ) f o r a p w 8 8 1 3 a n d q f n - 2 0 3 m m x 3 m m t h i n p a c k a g e ( t q f n 3 x 3 - 2 0 ) f o r a p w 8 8 1 3 a lead free and green devices available (rohs compliant) a p p l i c a t i o n s d d r 2 , a n d d d r 3 m e m o r y p o w e r s u p p l i e s s s t l - 2 s s t l - 1 8 a n d h s t l t e r m i n a t i o n the APW8813/a integrates a synchronous buck pwm controller to generate vddq, a sourcing and sinking ldo linear regulator to generate vtt. it provides a complete power supply for ddr2 and ddr3 memory system. it offers the lowest total solution cost in system where space is at a premium. the APW8813/a provides excellent transient response and accurate dc voltage output in either pfm or pwm mode. in pulse frequency mode (pfm), the APW8813/a provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. on tqfn4x4- 24a package, the forced pwm mode works nearly at con- stant frequency for low-noise requirements. the APW8813/a is equipped with accurate current-limit, output under-voltage, and output over-voltage protections. a power-on-reset function monitors the voltage on v cc prevents wrong operation during power on. the ldo is designed to provide a regulated voltage with bi-directional output current for ddr-sdram termination. the device integrates two power transistors to source or sink current up to 1.5a. it also incorporates current-limit and thermal shutdown protection. the output voltage of ldo tracks the voltage at vttref pin. an internal resistor divider is used to provide a half voltage of vddq for vttref and vtt voltage. the vtt output voltage is only requiring 20 m f of ceramic output capacitance for stability and fast transient response. the s3 and s5 pins provide the sleep state for vtt (s3 state) and suspend state (s4/s5 state) for device, when s5 and s3 are both pulled low the device provides the soft-off for vtt and vttref. the APW8813/a is available in 4mmx4mm 24-pin tqfn package, and the APW8813a is available in 3mmx3mm 20-pin tqfn package.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 p i n c o n f i g u r a t i o n s i m p l i f i e d a p p l i c a t i o n c i r c u i t vtt vddq v in +3v~28v pwm l out q1 q2 ddr ldo 5v r cs vddq/2 s3 s5 tqfn 3 x 3 - 20 ( top view ) apw 8813 a lgate vcc t o n s 5 s 3 v d d q s e t vddqsns vttref gnd vttsns vttgnd p h a s e b o o t l d o i n v t t pgnd cs pvcc 21 pgnd 14 13 12 11 15 2 3 4 5 1 19 18 17 16 20 7 8 9 10 6 u g a t e p g o o d pgnd vcc t o n s 5 s 3 v d d q s e t v d d q s n s n c vttref mode gnd vttsns vttgnd fccm l g a t e p h a s e b o o t l d o i n v t t cs _ gnd cs pvcc pgood 25 pgnd 17 16 15 14 13 18 2 3 4 5 6 1 23 22 21 20 19 24 8 9 10 11 12 7 u g a t e tqfn 4 x 4 - 24 a ( top view ) = thermal pad ( connected to gnd plane for better heat dissipation ) apw 8813
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 3 a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 , 2 ) symbol parameter rating unit v cc vcc supply voltage (vcc to gnd) - 0.3 ~ 7 v v pvcc pvcc supply voltage (pvcc to gnd) - 0.3 ~ 7 v v boot boot supply voltage (boot to phase) - 0.3 ~ 7 v v boot - gnd boot supply voltage (boot to gnd) - 0.3 ~ 3 5 v ugate volta ge (ugate to phase) <400n s pulse width >400n s pulse width - 5 ~ v boot +0.3 - 0.3 ~ v boot +0.3 v lgate voltage (lgate to gnd) <400n s pulse width >400n s pulse width - 5 ~ pvcc +0.3 - 0.3 ~ pvcc +0.3 v phase voltage (phase to gnd) <400n s pulse width >400n s pulse width - 5 ~ 3 5 - 0.3 ~ 2 8 v pgnd , vttgnd and cs_gnd t o gnd voltage - 0.3 ~ 0.3 v all other pins ( cs, mode, s3, s5, vttsns, vddqsns, ldoin, fccm, vddqset, pgood, vtt, vttref gnd) - 0.3 ~ 7 v t j maximum junction temperature 150 o c t stg storage temperature - 65 ~ 150 o c t sdr maximum soldering temperature, 10 seconds 260 o c note1: stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom- mended operating conditions" is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability note 2: the device is esd sensitive. handling precautions are recommended. o r d e r i n g a n d m a r k i n g i n f o r m a t i o n n o t e : a n p e c l e a d - f r e e p r o d u c t s c o n t a i n m o l d i n g c o m p o u n d s / d i e a t t a c h m a t e r i a l s a n d 1 0 0 % m a t t e t i n p l a t e t e r m i n a t i o n f i n i s h ; w h i c h a r e f u l l y c o m p l i a n t w i t h r o h s . a n p e c l e a d - f r e e p r o d u c t s m e e t o r e x c e e d t h e l e a d - f r e e r e q u i r e m e n t s o f i p c / j e d e c j - s t d - 0 2 0 d f o r m s l c l a s s i f i c a t i o n a t l e a d - f r e e p e a k r e f l o w t e m p e r a t u r e . a n p e c d e f i n e s ? g r e e n ? t o m e a n l e a d - f r e e ( r o h s c o m p l i a n t ) a n d h a l o g e n f r e e ( b r o r c l d o e s n o t e x c e e d 9 0 0 p p m b y w e i g h t i n h o m o g e n e o u s m a t e r i a l a n d t o t a l o f b r a n d c l d o e s n o t e x c e e d 1 5 0 0 p p m b y w e i g h t ) . apw 8813 / a handling code tem perature range package code apw 8813 xxxxx package code qb : tqfn 4 x 4 - 24 a qb : tqfn 3 x 3 - 20 temperature range i : - 40 to 85 o c handling code tr : tape & reel assembly material g : halogen and lead free device apw 8813 qb : assembly material xxxxx - date code apw 8813 a xxxxx apw 8813 a qb : xxxxx - date code
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 4 t h e r m a l c h a r a c t e r i s t i c s ( n o t e 3 ) symbol parameter typical value unit q ja thermal resistance - junction to ambient tqfn4x4 - 24a tqfn3x3 - 20 52 68 c/w q j c thermal resistance - junction to case tqfn4x4 - 24a tqfn3x3 - 20 7 8 c/w note 3: q ja and q jc are measured with the component mounted on a high effective the thermal conductivity test board in free air. the exposed pad of package is soldered directly on the pcb. symbol parameter range unit v cc , v pvcc vcc and pvcc supply voltage 4.5 ~ 5.5 v v in converter input voltage 3 ~ 28 v v vddq converter output voltage 0. 75 ~5.5v/ ddr 2 ( 1.8v)/ ddr 3 ( 1.5v) v v vtt ldo output voltage 0.375 ~ 2.75 v i out converter output current 0 ~ 15 a i vtt ldo output current - 1.5 ~ +1.5 a c vcc , c pvcc vcc and pvcc capacitance 1~ m f c vtt vtt output capacitance 10~100 m f c vttref vttref output capacitance 0.01~0.1 m f t a ambient temperature - 40 ~ 85 o c t j junction temperature - 4 0 ~ 125 o c r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s ( n o t e 4 ) note 4: refer to the typical application circuit. e l e c t r i c a l c h a r a c t e r i s t i c s APW8813/a symbol parameter test conditions min . typ . max . unit supply current i pvccsdn pvcc shutdown current t a =25 o c , v s3 = v s5 = 0v, no load - 0.1 1 m a i vcc vcc supply current t a = 25 o c , v s3 = v s5 = 5v, no load, pvcc plus vcc current, no switchi ng - 0.8 3 ma i vccstb vcc stan d by current t a = 25 o c , v s3 = 0v, v s5 = 5v, no load, pvcc plus vcc current, no switching - 240 800 m a i vccsdn vcc shutdown current t a =25 o c , v s3 = v s5 = 0v, no load - 0.1 1 m a i ldoin ldoin supply current t a = 25 o c , v s3 = v s 5 = 5v, no load - - 40 m a i ldoinstb ldoin stan d by current t a = 25 o c , v s3 = 0v, v s5 = 5v, no load - 0.1 10 i ldoinsdn ldoin shutdown current t a = 25 o c , v s3 = v s5 = 0v, no load - 0.1 1 m a power - on - reset v cc por threshold v cc rising 4.0 4.2 4.4 v v cc p or hysteresis - 100 - m v r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t s . t h e s e s p e c i f i c a t i o n s a p p l y o v e r v v c c = v p v c c = v b o o t = 5 v , v i n = 1 2 v a n d t a = - 4 0 ~ 8 5 c , u n l e s s o t h e r w i s e s p e c i f i e d . t y p i c a l v a l u e s a r e a t t a = 2 5 c .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 5 e l e c t r i c a l c h a r a c t e r i s t i c s ( c o n t . ) APW8813/a symbol parameter test conditions min . typ . max . unit vtt output v ldoin = v vddqsns = 1.8v - 0.9 - v vtt vtt output voltage v ldoin = v vddqsns = 1.5v - 0.75 - v v ldoin = v vddqsns = 1.8v, v vddqsns /2 - v vtt , i vtt = 0a - 20 - 20 v ldoin = v vddqsns = 1.8v, v vddqsns /2 - v vtt , i vtt = 1.5a - 30 - 30 v ldoin = v vddqsns = 1.5v, v vddqsns /2 - v vtt , i vtt = 0a - 20 - 20 v vtt vtt output tolerance v ldoin = v vddqsns = 1.5v, v vddqsns /2 - v vtt , i vtt = 1.5a - 30 - 30 mv t j = 25 o c 1.8 2 3 sourcing cur rent (v in = 1.8v) t j = 125 o c 1.6 - - t j = 25 o c - 2 - 2.2 - 3 sinking current (v in = 1.8v) t j = 125 o c - 1.6 - - a t j = 25 o c 1.6 1.8 2.6 sourcing current (v in = 1.5v) t j = 125 o c 1.1 - - t j = 25 o c - 1.6 - 1.8 - 2.6 i lim current - limit sinking current (v in = 1.5v) t j = 125 o c - 1.1 - - a upper mosfet - 350 500 r ds(on) vtt power mosfets r ds(on) lower mosfet - 350 500 m w i vttlk vtt leakage current v vtt = 1.25v, v s3 = 0v, v s5 = 5v, t a = 25 o c - 1.0 - 1.0 m a i vttsnslk vttsns lea kage current v vtt = 1.25v, t a = 25 o c - 1.00 0.01 1.00 m a i vttdis vtt discharge current v vtt = 0.5v, v s3 = v s5 = 0v, t a = 25 o c , v vref = 0v 15 25 35 ma v tt ref output v ldoin = v vddqsns = 1.8v, v vddqsns /2 - 0.9 - v vttref vttref output voltage v ldoin = v vddqsns = 1.5v, v vddqsns /2 - 0.75 - v 0ma < i vttref < 10ma, v vddqsns /2 - v vttref v ldoin = v vttref =1.8v - 18 - +18 vttref tolerance 0ma < i vttref < 10ma, v vddqsns /2 - v vttref v ldoin = v vddqsns = 1.5v - 20 - +20 mv vttref source current v vttre f = 0v 10 20 40 ma i vttref vttref sink current v vttref = 1.5v, v tt =0.75v - 10 - 20 - 40 ma vddq output v vddqset = 5v, no load, t a = 25 o c 1.787 1.8 1.813 v v vddqset = 5v, no load, t a = - 40 o c to 85 o c 1.782 1.8 1.818 v v vddq 1.8v vddq output voltage v vddqset = 5v, load = 0 to 10a, t a = 25 o c 1.764 1.8 1.836 v r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t s . t h e s e s p e c i f i c a t i o n s a p p l y o v e r v v c c = v p v c c = v b o o t = 5 v , v i n = 1 2 v a n d t a = - 4 0 ~ 8 5 c , u n l e s s o t h e r w i s e s p e c i f i e d . t y p i c a l v a l u e s a r e a t t a = 2 5 c .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 6 e l e c t r i c a l c h a r a c t e r i s t i c s ( c o n t . ) APW8813/a symbol parameter test conditions min . typ . max . unit vddq output (cont.) v vddqset = 0v, no load, t a = 25 o c 1.488 1.5 1.512 v v vddqset = 0v, no load, t a = - 40 o c to 85 o c 1.485 1.5 1.515 v v vddq 1.5v vddq output voltage v vddqset = 0v, l oad = 0 to 10a, t a = 25 o c 1.47 1.5 1.53 v adjust mode, t a = 25 o c 0.745 0.75 0.755 v adjust mode, t a = - 40 o c to 85 o c 0.7425 0.75 0.7575 v adjust mode, t a = 25 o c , v vcc = 4.5v to 5.5v, v in = 3v to 28v - 0.1 - +0.1 % v vddqset vddqset regulation voltage adjust mode, t a = 25 o c , load = 0 to 10a, v vcc = 4.5v to 5.5v - 1 - +1 % v vddqset = 0v (ddr3) - 240 - r vddqsns vddqsns input impedance v vddqset = 5v (ddr2) - 288 - k w vddqset input current v vddqset = 0.78v - 0.1 - +0.1 m a vddq discharge current v s3 = v s5 = 0v, v vddqsns = 0.5v, v mode = 0v (non - tracking) 15 25 - ma ldoin discharge current v s3 = v s5 = 0v, v vddqsns = 0.5v, v mode = 0.5v (tracking, only for APW8813) 400 550 - ma pwm controllers f sw operating frequency adjustable frequency 100 - 550 khz t ss internal s oft - s tart t ime s5 is high to v vddq regulation 0.9 1.2 1.5 ms t o o n t ime v in = 19v, v vddq = 1.5v, r ton = 1.2m 235 277 320 ns t off (min) minimum off t ime - 300 - ns t on (min) minimum on t ime 80 110 140 ns zero - crossing threshold - 9.5 0.5 10.5 mv vddq protections t a = 25 o c 9 10 11 m a cs pin sink current t emperature c oefficient , on t he b asis of 25c - 4500 - ppm/ o c ocp comparator offset (v pvcc - v cs ) - (v phase - pgnd), v pvcc - v cs = 60mv - 15 0 +15 mv vddq current - limit setti ng range v pvcc - v cs 30 - 200 mv vddq ovp trip threshold v vddq rising 120 125 130 % vddq ovp debounce delay v fb rising, dv = 10mv - 1.5 - m s vddq uvp trip threshold v vddq falling 60 70 80 % vddq uvp trip hysteresis - 3 - % vddq uvp debounce - 10 - m s vddq uvp enable delay - 2 - ms r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t s . t h e s e s p e c i f i c a t i o n s a p p l y o v e r v v c c = v p v c c = v b o o t = 5 v , v i n = 1 2 v a n d t a = - 4 0 ~ 8 5 c , u n l e s s o t h e r w i s e s p e c i f i e d . t y p i c a l v a l u e s a r e a t t a = 2 5 c .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 7 e l e c t r i c a l c h a r a c t e r i s t i c s ( c o n t . ) APW8813/a symbol parameter test conditions min . typ . max . unit pgood pgood in from lower (pgood goes high) 87 90 93 % pgood low hysteresis (pgood goes low) - 3 - % pgood in from higher (pgood goes low) 120 125 130 % v pgood pgood threshold p good high hysteresis (pgood goes high) - 3 - % i pgood p good leakage current v pgood = 5v - 0.1 1.0 m a p good sink current v pgood = 0.5v 2.5 7.5 - ma pgood debounce time - 63 - m s gate drivers ugate pull - up resistance boot - ugate = 0.5v - 5 7 w ugate sink resistance ugate - phase = 0.5v - 1 2.5 w lgate pull - up resistance pvcc - lgate = 0.5v - 5 7 w lgate sink resistance lgate - pgnd = 0.5v - 1 2.5 w u gate to lgate dead t ime ugate falling to lgate rising, no load - 40 - ns lgate to ugate dead t ime lgate falling to ugate rising, no load - 40 - ns bootstrap diode forward voltage v pvcc - v boot , i f = 10ma, t a = 25 o c - 0.5 0.8 v reverse leakage v boot = 30v, v phase = 25v, v pvcc = 5v, t a = 25 o c - - 0.5 m a logic threshold v ih s3, s5 high threshold voltage s3, s5 rising 1.6 - - v v il s3, s5 low threshold voltage s3, s5 falling - - 0.3 v s5 to s3 debounce time s5 from l to h, vddq, vref are on - 90 - m s s3 to s0 debounce time s3 from l to h, vtt is on - 10 - m s i ileak logic input leakage current v s3 = v s5 = v mode = 5v, t a = 25 o c - 1 - 4.7 m a v fccmthr fccm high threshold (only for APW8813) in au tomatic pfm/pwm mode 4.7 - - v v fccmthf fccm low threshold (only for APW8813) in force pwm mode - - 0.1 v no discharge 4.7 - - v thmode mode threshold (only for APW8813) non - tracking discharge - - 0.1 v v vddq = 1.5v 0.08 0.15 0.4 vddqset threshold v vddq = 1.8v 3.5 4 4.5 v thermal shutdown t sd thermal shutdown temperature t j rising - 160 - o c thermal shutdown hysteresis - 25 - o c r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t s . t h e s e s p e c i f i c a t i o n s a p p l y o v e r v v c c = v p v c c = v b o o t = 5 v , v i n = 1 2 v a n d t a = - 4 0 ~ 8 5 c , u n l e s s o t h e r w i s e s p e c i f i e d . t y p i c a l v a l u e s a r e a t t a = 2 5 c .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 8 p i n d e s c r i p t i o n pin APW8813 APW8813a name function 1 1 vttgnd power ground output for the vtt ldo. 2 2 vttsns voltage sense input for the vtt ldo. connect to plus terminal of the vtt ldo output c apacitor . 3 3 gnd signal ground for the pwm controller and vtt ldo. conn ect to minus terminal of the vtt ldo output capacitor. 4 - mode discharge mode setting pin. when this pin connects to vcc, it is no discharge state. when this pin connects to vddq, it is tracking discharge state. when this pin connects to gnd, it is non - t racking discharge state. 5 4 vttref vttref buffered reference output. 6 - fccm selection pin for pwm controller to opera te in either forced pwm or automatic pwm/pfm mode . force pwm mode is enable when fccm pin is pulled below the falling threshold voltag e v fccmthf , and force pwm is disabled when the fccm pin is pulled above the rising threshold voltage v fccmthr . 7 - nc no connection. 8 5 vddqsns vddq reference input for vtt and vttref. power supply for the vttref. discharge current sinking terminal for vddq n on - tracking discharge. output voltage feedback input for vddq output if vddqset pin is connected to v cc or gnd . 9 6 vddqset vddq output voltage setting pin. 10 7 s3 s3 signal input. 11 8 s5 s5 signal input. 12 9 ton this p in is a llowed to a djust t he s witching f requency. connect a resistor r ton from ton pin to phase vin terminal. 13 10 pgood p ower - good output pin. p good is an open drain output used to indicate the status of the output voltage. when vddq output voltage is within the target range, it is in high state. 14 11 vcc filtered 5v power supply input for internal control circuitry. connect r - c network from p v cc to v cc . 15 12 pvcc 5v power s upply voltage input pin for low - side mosfet gate driver on tqfn - 24 package . 16 13 cs o ver - current t rip voltage setting input for r ds(on) current sense scheme if connected to v cc through the voltage setting resistor. 17 - cs_gnd current sense comparator positive input terminal and the ground for power good circuit. 18 14 pgnd power ground of the lgate low - side mosfet driver. connect the pin to the source of the low - side mosfet. also it is current sense comparator positive input terminal and the ground of power good circuit on ssop - 20 package. 19 15 lgate output of the low - side mosfet driver for pwm . c onnect this pin to gate of the low - side mosfet. swings from pgnd to vcc. 20 16 phase j unction point of the high - side mosfet source, output filter inductor and the low - side mosfet drain. connect this pin to the source of the high - side mosfet. phase serves as the lower supply rail for the ugate high - side gate driver. 21 17 ugate output of the high - side mosfet driver for pwm. connect this pin to gate of the high - side mosfet. 22 18 boot supply input for the ugate gate driver and an internal level - shift ci rcuit. connect to an external capacitor and diode to create a boosted voltage suitable to drive a logic - level n - channel mosfet. 23 19 ldoin supply voltage input for the vtt ldo. 24 20 vtt power output for the vtt ldo .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 9 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s v d d q v o l t a g e r e g u l a t i o n v s . j u n c t i o n t e m p e r a t u r e s u p p l y c u r r e n t v s . j u n c t i o n t e m p e r a t u r e s h u t d o w n c u r r e n t v s . j u n c t i o n t e m p e r a t u r e c s p i n s i n k c u r r e n t v s . j u n c t i o n t e m p e r a t u r e v d d q v o l t a g e r e g u l a t i o n v s . j u n c t i o n t e m p e r a t u r e junction temperature , t j ( o c ) 0 s u p p l y c u r r e n t , i p v c c p l u s i v c c ( m a ) 2 . 5 2 1 . 5 0 . 5 1 3 . 0 - 40 - 20 0 20 40 60 80 100 120 s h u t d o w n c u r r e n t , i p v c c p l u s i v c c ( u a ) 1 . 0 0 . 8 0 . 6 0 . 2 0 . 4 0 junction temperature , t j ( o c ) - 40 - 20 0 20 40 60 80 100 120 c s s i n k c u r r e n t ( u a ) junction temperature , t j ( o c ) 0 2 4 6 8 10 12 - 40 - 20 0 20 40 60 80 100 120 16 14 f r e q u e n c y v s . j u n c t i o n t e m p e r a t u r e s w i t c h i n g f r e q u e n c y , f s w ( k h z ) junction temperature , t j ( o c ) 270 280 290 300 310 320 330 - 40 - 20 0 20 40 60 80 100 120 junction temperature , t j ( o c ) v d d q o u t p u t v o l t a g e ( v ) 1 . 45 1 . 55 1 . 53 1 . 51 1 . 47 1 . 49 - 40 - 20 0 20 40 60 80 100 120 vddqset = gnd , vddq = 1 . 5 v junction temperature , t j ( o c ) v d d q o u t p u t v o l t a g e ( v ) 1 . 75 1 . 85 1 . 83 1 . 81 1 . 77 1 . 79 - 40 - 20 0 20 40 60 80 100 120 vddqset = vcc , vddq = 1 . 8 v
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 0 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s v t t l o a d r e g u l a t i o n l o a d r e g u l a t i o n , v v d d q = 1 . 5 v f s w = 3 0 0 k h z l o a d r e g u l a t i o n , v v d d q = 1 . 8 v f s w = 3 0 0 k h z l i n e r e g u l a t i o n , v v d d q = 1 . 5 v f s w = 3 0 0 k h z l i n e r e g u l a t i o n , v v d d q = 1 . 8 v f s w = 3 0 0 k h z v t t v o l t a g e , v v t t ( v ) vtt current , i vtt ( a ) 0 . 74 0 . 745 0 . 75 0 . 755 0 . 76 - 1 . 5 - 1 - 0 . 5 0 0 . 5 1 1 . 5 1 . 53 1 . 45 1 . 47 1 . 49 1 . 51 vddq current ( a ) v d d q v o l t a g e , v v d d q ( v ) 1 . 55 pfm mode force pwm mode 10 8 6 4 2 0 ( only for apw 8813 ) vddq current ( a ) v d d q v o l t a g e , v v d d q ( v ) 10 8 6 4 2 0 1 . 83 1 . 75 1 . 77 1 . 79 1 . 81 1 . 85 pfm mode force pwm mode ( only for apw 8813 ) v d d q v o l t a g e , v v d d q ( v ) input voltage ( v ) 5 10 15 20 25 1 . 83 1 . 75 1 . 77 1 . 79 1 . 81 1 . 85 pfm mode force pwm mode ( only for apw 8813 ) input voltage ( v ) v d d q v o l t a g e , v v d d q ( v ) 5 10 15 20 25 1 . 53 1 . 45 1 . 47 1 . 49 1 . 51 1 . 55 pfm mode force pwm mode ( only for apw 8813 )
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 1 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y 0 100 200 300 400 500 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) ddrii , v in = 8 v , v ddq = 1 . 8 v , s 5 = 5 v , s 3 = gnd 0 100 200 300 400 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) ddrii , v in = 12 v , v ddq = 1 . 8 v , s 5 = 5 v , s 3 = gnd 500 0 100 200 300 400 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) ddriii , v in = 8 v , v ddq = 1 . 5 v , s 5 = 5 v , s 3 = gnd 0 100 200 300 400 500 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) ddriii , v in = 12 v , v ddq = 1 . 5 v , s 5 = 5 v , s 3 = gnd o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y 0 100 200 300 400 500 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) ddrii , v in = 20 v , v ddq = 1 . 8 v , s 5 = 5 v , s 3 = gnd 600 0 100 200 300 400 500 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) 700 600 ddriii , v in = 20 v , v ddq = 1 . 5 v , s 5 = 5 v , s 3 = gnd
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 2 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y o u t p u t c u r r e n t v s . s w i t c h i n g f r e q u e n c y 0 100 200 300 400 500 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) r ton = 1 m , v in = 19 v , v ddq = 1 . 5 v , s 5 = 5 v , s 3 = gnd in force pwm in auto pfm / pwm 600 0 100 200 300 400 500 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) r ton = 750 k , v in = 19 v , v ddq = 1 . 5 v , s 5 = 5 v , s 3 = gnd in force pwm in auto pfm / pwm 600 0 100 200 300 400 500 0 . 001 0 . 01 0 . 1 1 10 output current ( a ) s w i t c h i n g f r e q u e n c y ( k h z ) r ton = 1 . 2 m , v in = 19 v , v ddq = 1 . 5 v , s 5 = 5 v , s 3 = gnd in force pwm in auto pfm / pwm
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 3 o p e r a t i n g w a v e f o r m s s 5 e n a b l e , n o l o a d n o n - z e r o v d d q s 5 e n a b l e s 5 s h u t d o w n - t r a c k i n g d i s c h a r g e ( o n l y f o r a p w 8 8 1 3 ) s 5 s h u t d o w n - n o n - t r a c k i n g d i s c h a r g e ch 1 : v s 5 ( 5 v / div ) ch 2 : v vddq ( 1 v / div ) ch 3 : v vttref ( 500 mv / div ) ch 4 : v pok ( 5 v / div ) time : 500 m s / div ch 1 : v s 5 ( 5 v / div ) ch 2 : v vddq ( 1 v / div ) ch 3 : v ugate ( 20 v / div ) ch 4 : v pok ( 5 v / div ) time : 500 m s / div ch 1 : v s 5 ( 5 v / div ) ch 2 : v vddq ( 1 v / div ) ch 3 : v vttref ( 500 mv / div ) ch 4 : v vtt ( 500 mv / div ) time : 200 m s / div 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 ch 1 : v s 5 ( 5 v / div ) ch 2 : v vddq ( 1 v / div ) ch 3 : v vttref ( 500 mv / div ) ch 4 : v vtt ( 500 mv / div ) time : 5 m s / div
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 4 o p e r a t i n g w a v e f o r m s s 3 e n a b l e - s h u t d o w n l o a d t r a n s i e n t , i v d d q = 0 a - > 1 0 a - > 0 a p f m m o d e l o a d t r a n s i e n t , i v d d q = 0 a - > 1 0 a - > 0 a f o r c e p w m m o d e ( o n l y f o r a p w 8 8 1 3 ) ch 1 : v s 3 ( 5 v / div ) ch 2 : v vddq ( 1 v / div ) ch 3 : v vttref ( 500 mv / div ) ch 4 : v vtt ( 500 mv / div ) time : 10 ms / div 1 2 3 4 1 2 3 4 1 2 3 4 ch 1 : v vddq ( 200 mv / div ) ch 2 : v ugate ( 20 v / div ) ch 3 : v lgate ( 5 v / div ) ch 4 : i l ( 10 a / div ) time : 20 m s / div ch 1 : v vddq ( 200 mv / div ) ch 2 : v ugate ( 20 v / div ) ch 3 : v lgate ( 5 v / div ) ch 4 : i l ( 10 a / div ) time : 20 m s / div
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 5 b l o c k d i a g r a m a p w 8 8 1 3 boot ugate phase lgate pgnd pwm signal controller 70 % x 0 . 75 125 % x 0 . 75 ov uv cs zc phase ton generator vddqsns s 3 s 5 vtt vttref ldoin vttsns 0 . 15 v 4 v ddr 3 adjust ddr 2 0 . 75 v vddqset 0 . 75 x 90 % / 87 % 0 . 75 x 125 % / 122 % delay por vcc 1 . 25 v v ref error comparator vcc 10 m a 0 . 15 v 4 v mode discharge mode select current - limit s 3 , s 5 control logic thermal shutdown soft - start current - limit 0 . 5 x vddq + 5 / 10 % 0 . 5 x vddq - 5 / 10 % vttgnd pgood gnd adjust 0 . 5 x vddq pvcc cs _ gnd adjust ton force pwm or automatic pfm / pwm mode selection fccm
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 6 b l o c k d i a g r a m ( c o n t . ) a p w 8 8 1 3 a boot ugate phase lgate pgnd pwm signal controller 70 % x 0 . 75 125 % x 0 . 75 ov uv cs zc phase ton generator vddqsns s 3 s 5 vtt vttref ldoin vttsns 0 . 15 v 4 v ddr 3 adjust ddr 2 0 . 75 v vddqset 0 . 75 x 90 %/ 87 % 0 . 75 x 125 %/ 122 % delay por vcc 1 . 25 v v ref error comparat or vcc 10 u a current limit s 3 , s 5 control logic thermal shutdown soft start current limit 0 . 5 x vddq + 5 / 10 % 0 . 5 x vddq - 5 / 10 % vttgnd pgood gnd adjust 0 . 5 x vddq pvcc adjust ton non - tracking discharge
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 7 t y p i c a l a p p l i c a t i o n c i r c u i t v d d q = a d j u s t a b l e , e x t e r n a l l d o i n , n o n - t r a c k i n g d i s c h a r g e a p w 8 8 1 3 vttgnd vttref l g a t e p h a s e u g a t e b o o t l d o i n v t t vcc pvcc cs csgnd pgnd pgood t o n s 5 v d q q s e t v d d q s n s n c vttsns gnd mode fccm s 3 apw 8813 tqfn 4 x 4 - 24 a vddq 10 a c out q 1 q 2 l out c in v in 7 v ~ 25 v 1 m h 150 m f x 2 10 m f x 2 c boot 0 . 1 m f r top 75 k , 1 % r gnd 75 k , 1 % c pvcc 4 . 7 m f pvcc r pgood 100 k r cs 5 . 1 k , 1 % c vcc 1 m f r vcc 2 . 2 vttref vddq / 2 0 . 033 m f c vttref vtt vddq / 2 10 m f x 2 c vtt vddq vddq phase vin or phase r ton 1 . 2 m vcc vcc 100 k 100 k
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 8 t y p i c a l a p p l i c a t i o n c i r c u i t v d d q = a d j u s t a b l e , e x t e r n a l l d o i n a p w 8 8 1 3 a vttgnd vttref lgate p h a s e u g a t e b o o t l d o i n v t t vcc pvcc cs pgnd t o n s 5 v d q q s e t vttsns gnd s 3 apw 8813 a tqfn - 20 vddq 10 a c out q 1 q 2 l out c in v in 7 v ~ 25 v 1 uh 150 uf x 2 10 uf x 2 c boot 0 . 1 uf r top 75 k , 1 % r gnd 75 k , 1 % pgood c pvcc 4 . 7 uf pvcc r p good 100 k r cs 5 . 1 k , 1 % c vcc 1 uf r vcc 2 . 2 vttref vddq / 2 0 . 033 uf c vttref vtt vddq / 2 10 uf x 2 c vtt vddq vddq phase v in or phase r ton 1 . 2 m vcc vddqsns p g o o d
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 1 9 f u n c t i o n d e s c r i p t i o n the APW8813/a integrates a synchronous buck pwm con- troller to generate vddq, a sourcing and sinking ldo linear regulator to generate vtt. it provides a complete power supply for ddr2 and ddr3 memory system in both tqfn packages. the preset output voltage is se- lectable from 1.8v or 1.5v. user defined output voltage is also possible and can be adjustable from 0.75v to 5.5v. input voltage range of the pwm converter is 3v to 28v. the converter runs an adaptive on-time pwm operation at high-load condition and automatically reduces fre- quency to keep excellent efficiency down to several ma. the vtt ldo can source and sink up to 1.5a peak cur- rent with only 10 m f ceramic output capacitor. vttref tracks vddq/2 within 1% of vddq. vtt output tracks vttref within 20 mv at no load condition while 40 mv at full load. the ldo input can be separated from vddq and optionally connected to a lower voltage by using ldoin pin. this helps reducing power dissipation in sourcing phase. the APW8813/a is fully compatible to jedec ddr2/ddr3 specifications at s3/s5 sleep state (see table 1). only for APW8813, when both vtt and vddq are disabled, the part has two options of output discharge function. the tracking discharge mode dis- charges vddq and vtt outputs through the internal ldo transistors and then vtt output tracks half of vddq volt- age during discharge. the non-tracking discharge mode discharges outputs using internal discharge mosfets that are connected to vddqsns and vtt. the current capability of these discharge mosfets are limited and discharge occurs more slowly than the tracking discharge. selecting non-discharge mode can disable these discharge functions. c o n s t a n t - o n - t i m e p w m c o n t r o l l e r w i t h i n p u t f e e d - f o r - w a r d the constant-on-time control architecture is a pseudo- fixed frequency with input voltage feed-forward. this ar- chitecture relies on the output filter capacitor?s effective series resistance (esr) to act as a current-sense resistor, so the output ripple voltage provides the pwm ramp signal. in pfm operation, the high-side switch on-time controlled by the on-time generator is determined solely by a one- shot whose pulse width is inversely proportional to input voltage and directly proportional to output voltage. in pwm operation, the high-side switch on-time is determined by a switching frequency control circuit in the on-time gen- erator block. the switching frequency control circuit senses the switching frequency of the high-side switch and keeps regulating it at a constant frequency in pwm mode. the design improves the frequency variation and be more outstanding than a conventional constant-on- time controller which has large switching frequency varia- tion over input voltage, output current and temperature. both in pfm and pwm, the on-time generator, which senses input voltage on phase pin, provides very fast on-time response to input line transients. another one-shot sets a minimum off-time (typical: 300ns). the on-time one-shot is triggered if the error com- parator is high, the low-side switch current is below the current-limit threshold, and the minimum off-time one- shot has timed out. p o w e r - o n - r e s e t a p o w e r - o n - r e s e t ( p o r ) f u n c t i o n i s d e s i g n e d t o p r e v e n t w r o n g l o g i c c o n t r o l s w h e n t h e v c c v o l t a g e i s l o w . t h e p o r f u n c t i o n c o n t i n u a l l y m o n i t o r s t h e b i a s s u p p l y v o l t - a g e o n t h e v c c p i n i f a t l e a s t o n e o f t h e e n a b l e p i n s i s s e t h i g h . w h e n t h e r i s i n g v c c v o l t a g e r e a c h e s t h e r i s i n g p o r v o l t a g e t h r e s h o l d ( 4 . 2 v t y p i c a l ) , t h e p o r s i g n a l g o e s h i g h a n d t h e c h i p i n i t i a t e s s o f t - s t a r t o p e r a t i o n s . w h e n t h i s v o l t a g e d r o p s l o w e r t h a n 4 . 1 v ( t y p i c a l ) , t h e p o r d i s - a b l e s t h e c h i p . s o f t - s t a r t t h e a p w 8 8 1 3 / a i n t e g r a t e s d i g i t a l s o f t - s t a r t c i r c u i t s t o r a m p u p t h e o u t p u t v o l t a g e o f t h e c o n v e r t e r t o t h e p r o g r a m m e d r e g u l a t i o n s e t p o i n t a t a p r e d i c t a b l e s l e w r a t e . t h e s l e w r a t e o f o u t p u t v o l t a g e i s i n t e r n a l l y c o n t r o l l e d t o l i m i t t h e i n r u s h c u r r e n t t h r o u g h t h e o u t p u t c a p a c i t o r s d u r i n g s o f t - s t a r t p r o c e s s . t h e f i g u r e 1 s h o w s v d d q s o f t - s t a r t s e q u e n c e . w h e n t h e s 5 p i n i s p u l l e d a b o v e t h e r i s i n g s 5 t h r e s h o l d v o l t a g e , t h e d e v i c e i n i t i a t e s a s o f t - s t a r t p r o c e s s t o r a m p u p t h e o u t p u t v o l t a g e . t h e s o f t - s t a r t i n t e r v a l i s 1 . 2 m s ( t y p i c a l ) a n d i n d e p e n d e n t o f t h e u g a t e s w i t c h i n g f r e q u e n c y .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 0 f u n c t i o n d e s c r i p t i o n ( c o n t . ) s o f t - s t a r t ( c o n t . ) during soft-start stage before the pgood pin is ready, the under-voltage protection is prohibited. the over-volt- age and current-limit protection functions are enabled. if the output capacitor has residue voltage before start-up, both low-side and high-side mosfets are in off-state until the internal digital soft-start voltage equals to the v vddqset or internal feedback voltage. this will ensure the output voltage starts from its existing voltage level. the vtt ldo part monitors the output current, both sourc- ing and sinking current, and limits the maximum output current to prevent damages during current overload or short circuit (shorted from vtt to gnd or ldoin) conditions. the vtt ldo provides a soft-start function, using the constant current to charge the output capacitor that gives a rapid and linear output voltage rise. if the load current is above the current-limit start-up, the vtt cannot start successfully. APW8813/a has an independent counter for each output, but the pgood signal indicates only the status of vddq and does not indicate vtt power good externally. 1.2ms 2ms s5 v out v cc and v pvcc v pgood f i g u r e 1 . s o f t - s t a r t s e q u e n c e p o w e r - g o o d o u t p u t ( p g o o d ) pgood is an open-drain output and the pgood com- parator continuously monitors the output voltage. pgood is actively held low in shutdown, and standby. when pwm converter?s output voltage is greater than 90% of its tar- get value, the internal open-drain device will be pulled low. after 63 m s debounce time, the pgood goes high. the pgood goes low if v vddq output is 13% below or 25% above its nominal regulation point. u n d e r - v o l t a g e p r o t e c t i o n ( u v p ) if vddqset is connected to vcc or gnd, an internal resistor divider inside vddqsns pin makes the feed- back voltage. if an external resistor divider is connected to vddqset pin, the feedback voltage is vddqset volt- age itself. in the process of operation, if a short-circuit occurs, the output voltage will drop quickly. when load current is big- ger than current-limit threshold value, the output voltage will fall out of the required regulation range. the under- voltage continually monitors the setting output voltage after 2ms of pwm operations to ensure start-up. if a load step is strong enough to pull the output voltage lower than the under-voltage threshold (70% of normal output voltage), after 10 m s debounce time, APW8813/a shuts down the output gradually and latches off both high and low side mosfets. o v e r - v o l t a g e p r o t e c t i o n the feedback voltage should increase over 125% of the reference voltage due to the high-side mosfet failure or for other reasons, and the over-voltage protection com- parator designed with a 1.5 m s noise filter will force the low-side mosfet gate driver to be high. this action ac- tively pulls down the output voltage and eventually at- tempts to blow the battery fuse. when the ovp occurs, the pgood pin will pull down and latch-off the converter. this ovp scheme only clamps the voltage overshoot, and does not invert the output voltage when otherwise activated with a continuously high output from low-side mosfet driver. it?s a common problem for ovp schemes with a latch. once an over-voltage fault condition is set, toggling vcc power-on-reset signal can only reset it.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 1 f u n c t i o n d e s c r i p t i o n ( c o n t . ) p w m c o n v e r t e r c u r r e n t - l i m i t the current-limit circuit employs an unique ?valley? cur- rent sensing algorithm (figure 2). cs pin should be con- nected to vcc through the trip voltage-setting resistor, r cs . cs terminal sinks 10 m a current, i cs , and the current- limit threshold is set to the voltage across the r cs . the voltage between pgnd and phase pin monitors the in- ductor current so that phase pin should be connected to the drain terminal of the low side mosfet. pgnd is used as the positive current sensing node so that pgnd should be connected to the proper current sensing device, i.e. the sense resistor or the source terminal of the low side mosfet. if the magnitude of the current-sense signal is above the current-limit threshold, the pwm is not allowed to initiate a new cycle. the actual peak current is greater than the current-limit threshold by an amount equal to the induc- tor ripple current. therefore, the exact current-limit char- acteristic and maximum load capability are the function of the sense resistance, inductor value, and input voltage. the equation for the current-limit threshold is as below: where i limit is the desired current-limit threshold r cs is the value of the current sense resistor con- nected to cs and vcc pins v cs is the voltage across the r cs resistor i ripple is inductor peak to peak current f sw is the pwm switching frequency in a current-limit condition, the current to the load exceeds the current to the output capacitor, thus the output voltage tends to fall down. if the output voltage becomes less than power good level, the v cs is cut into half and the output voltage tends to be even lower. eventually, it crosses the under-voltage protection threshold and shutdown. ( ) in vddq sw vddq in ds(on) cs ripple ds(on) cs limit v v x f l 2 v v r a 10 r 2 i r v i - + m = + = time i n d u c t o r c u r r e n t 0 i limit i peak i valley f i g u r e 2 . c u r r e n t - l i m i t a l g o r i t h m v t t s i n k / s o u r c e r e g u l a t o r the output voltage at vtt pin tracks the reference voltage applied at vttref pin. two internal n-channel mosfets controlled by separate high bandwidth error amplifiers regulate the output voltage by sourcing current from ldoin pin or sinking current to gnd pin. to prevent two pass transistors from shoot-through, a small voltage offset is created between the positive inputs of the two error amplifiers. the vtt with fast response feedback loop keeps tracking to the vttref within 40mv at all condi- tions including fast load transient. s 3 , s 5 c o n t r o l in the ddr2/ddr3 memory applications, it is important to keep vddq always higher than vtt/vttref including both start-up and shutdown. the s3 and s5 signals control the vddq, vtt, vttref states and these pins should be connected to slp_s3 and slp_s5 signals respectively. the table1 shows the truth table of the s3 and s5 pins. when both s3 and s5 are above the logic threshold voltage, the vddq, vtt and vttref are turned on at s0 state. when s3 is low and s5 is high, the vddq and vttref are kept on while the vtt voltage is disabled and left high impedance in s3 state. when both s3 and s5 are low, the vddq, vtt and vttref are turned off and discharged to the ground ac- cording to the discharge mode selected by mode pin during s4/s5 state, only for APW8813. on APW8813a, the default discharge mode is non-tracking discharge.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 2 f u n c t i o n d e s c r i p t i o n ( c o n t . ) s 3 , s 5 c o n t r o l ( c o n t . ) table1: the truth table of s3 and s5 pins. state s3 s5 vddq vttref vtt s0 h h 1 1 1 s3 l h 1 1 0 (high - z) s4/5 l l 0 (discharge) 0 (discharge) 0 (discharge) v d d q a n d v t t d i s c h a r g e c o n t r o l a p w 8 8 1 3 / a d i s c h a r g e s v d d q , v t t r e f a n d v t t o u t p u t s d u r i n g s 3 a n d s 5 a r e b o t h l o w . t h e a p w 8 8 1 3 a d e f a u l t d i s c h a r g e m o d e i s n o n - t a c k i n g d i s c h a r g e a n d t h e r e a r e t w o d i f f e r e n t d i s c h a r g e m o d e s f o r a p w 8 8 1 3 . c o n n e c t i n g m o d e p i n a s s h o w n i n t a b l e 2 c a n s e t t h e d i s c h a r g e m o d e . table 2. discharge selection. (only for APW8813) mode discharge mode vcc no discharge vddq tracking discharge gnd non - tracing discharge w h e n i n t r a c k i n g - d i s c h a r g e m o d e , t h e d e v i c e d i s c h a r g e s o u t p u t s t h r o u g h t h e i n t e r n a l v t t r e g u l a t o r t r a n s i s t o r s a n d v t t o u t p u t t r a c k s h a l f o f v d d q v o l t a g e d u r i n g t h i s d i s c h a r g e . n o t e t h a t v d d q d i s c h a r g e c u r r e n t f l o w s v i a l d o i n t o v t t g n d t h u s l d o i n m u s t b e c o n n e c t e d t o v d d q o u t p u t i n t h i s m o d e . t h e i n t e r n a l l d o c a n h a n d l e u p t o 1 . 5 a a n d d i s c h a r g e q u i c k l y . a f t e r v d d q i s d i s c h a r g e d d o w n t o 0 . 2 v , t h e i n t e r n a l l d o i s t u r n e d o f f a n d t h e o p - e r a t i o n m o d e i s c h a n g e d t o t h e n o n - t r a c k i n g d i s c h a r g e m o d e . w h e n i n n o n - t r a c k i n g - d i s c h a r g e m o d e , t h e d e v i c e d i s - c h a r g e s o u t p u t s u s i n g i n t e r n a l m o s f e t s t h a t a r e c o n - n e c t e d t o v d d q s n s a n d v t t . t h e c u r r e n t c a p a b i l i t y o f t h e s e m o s f e t s i s l i m i t e d t o d i s c h a r g e s l o w l y . n o t e t h a t v d d q d i s c h a r g e c u r r e n t f l o w s f r o m v d d q s n s t o p g n d i n t h i s m o d e . i n c a s e o f n o d i s c h a r g e m o d e , a p w 8 8 1 3 / a d o e s n o t d i s c h a r g e o u t p u t c h a r g e a t a l l . t h e r m a l s h u t d o w n a thermal shutdown circuit limits the junction tempera- ture of APW8813/a. when the junction temperature ex- ceeds +160 o c, pwm converter, vttldo and vttref are shut off, allowing the device to cool down. the regulator regulates the output again through initiation of a new soft- start cycle after the junction temperature cools by 25 o c, resulting in a pulsed output during continuous thermal overload conditions. the thermal shutdown is designed with a 25 o c hysteresis to lower the average junction tem- perature during continuous thermal overload conditions, extending lifetime of the device. for normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed +125 o c. p r o g r a m m i n g t h e o n - t i m e c o n t r o l a n d p w m s w i t c h - i n g f r e q u e n c y t h e a p w 8 8 1 3 / a d o e s n o t u s e a c l o c k s i g n a l t o p r o d u c e p w m . t h e d e v i c e u s e s t h e c o n s t a n t - o n - t i m e c o n t r o l a r - c h i t e c t u r e t o p r o d u c e p s e u d o - f i x e d f r e q u e n c y w i t h i n p u t v o l t a g e f e e d - f o r w a r d . t h e o n - t i m e p u l s e w i d t h i s p r o p o r - t i o n a l t o o u t p u t v o l t a g e v v d d q a n d i n v e r s e s p r o p o r t i o n a l t o i n p u t v o l t a g e v i n . i n p w m , t h e o n - t i m e c a l c u l a t i o n i s w r i t - t e n a s b e l o w : ( ) ns v mv v r t in vddq ton on 50 75 4 1 10 5 . 11 12 - ? ? + = - w h e r e : r t o n i s t h e r e s i s t o r c o n n e c t e d f r o m t o n p i n t o v i n o r p h a s e p i n . f u r t h e r m o r e , t h e a p p r o x i m a t e p w m s w i t c h - i n g f r e q u e n c y i s w r i t t e n a s : on in vddq sw sw on t v v f f t = t = d where: f sw is the pwm switching frequency. APW8813/a doesn?t have vin pin to calculate on-time pulse width. therefore, monitoring v phase voltage as in- put voltage to calculate on-time when the high-side mosfet is turned on. and then, use the relationship be- tween ontime and duty cycle to obtain the switching frequency.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 3 a p p l i c a t i o n i n f o r m a t i o n o u t p u t v o l t a g e s e l e c t i o n connect vddqset to gnd to set the ddr3 fixed 1.5v or connect vddqset to vcc to set the ddr2 fixed 1.8v output voltage. the output voltage, v out = v vddq , of pwm can be also adjusted from 0.75v to 5.5v with a resistor- driver at vddqset between vddqsns and gnd. using 1% or better resistors for the resistive divider is recommended. the vddqset pin is the inverter input of the error amplifier, and the reference voltage is 0.75v. take the example, the output voltage of pwm1 is deter- mined by: w h e r e f s w i s t h e s w i t c h i n g f r e q u e n c y o f t h e r e g u l a t o r . a l t h o u g h i n c r e a s e t h e i n d u c t o r v a l u e a n d f r e q u e n c y r e d u c e t h e r i p p l e c u r r e n t a n d v o l t a g e , t h e r e i s a t r a d e o f f b e t w e e n t h e i n d u c t o r ? s r i p p l e c u r r e n t a n d t h e r e g u l a t o r l o a d t r a n s i e n t r e s p o n s e t i m e . a s m a l l e r i n d u c t o r w i l l g i v e t h e r e g u l a t o r a f a s t e r l o a d t r a n s i e n t r e s p o n s e a t t h e e x p e n s e o f h i g h e r r i p p l e c u r r e n t . i n c r e a s i n g t h e s w i t c h i n g f r e q u e n c y ( f s w ) a l s o r e d u c e s t h e r i p p l e c u r r e n t a n d v o l t a g e , b u t i t w i l l i n c r e a s e t h e s w i t c h i n g l o s s o f t h e m o s f e t s a n d t h e where r top is the resistor connected from v out i to v vddqset and r gnd is the resistor connected from vddqset to gnd. o u t p u t i n d u c t o r s e l e c t i o n t h e d u t y c y c l e o f a b u c k c o n v e r t e r i s t h e f u n c t i o n o f t h e i n p u t v o l t a g e a n d o u t p u t v o l t a g e . o n c e a n o u t p u t v o l t a g e i s f i x e d , i t c a n b e w r i t t e n a s : in out v v d = in out sw out in ripple v v l f v - v i = o u t p u t c a p a c i t o r s e l e c t i o n o u t p u t v o l t a g e r i p p l e a n d t h e t r a n s i e n t v o l t a g e d e v i a t i o n a r e f a c t o r s t h a t h a v e t o b e t a k e n i n t o c o n s i d e r a t i o n w h e n s e l e c t i n g a n o u t p u t c a p a c i t o r . h i g h e r c a p a c i t o r v a l u e a n d l o w e r e s r r e d u c e t h e o u t p u t r i p p l e a n d t h e l o a d t r a n s i e n t d r o p . t h e r e f o r e , s e l e c t i n g h i g h p e r f o r m a n c e l o w e s r c a p a c i t o r s i s i n - t e n d e d f o r s w i t c h i n g r e g u l a t o r a p p l i c a t i o n s . i n a d d i t i o n t o h i g h f r e q u e n c y n o i s e r e l a t e d m o s f e t t u r n - o n a n d t u r n - o f f , t h e o u t p u t v o l t a g e r i p p l e i n c l u d e s t h e c a p a c i t a n c e v o l t - a g e d r o p a n d e s r v o l t a g e d r o p c a u s e d b y t h e a c p e a k - t o - p e a k c u r r e n t . t h e s e t w o v o l t a g e s c a n b e r e p r e s e n t e d b y : the inductor value determines the inductor ripple current and affects the load transient reponse. higher inductor value reduces the inductor?s ripple current and induces lower output ripple voltage. the ripple current and ripple voltage can be approxminated by: esr ripple esr sw out ripple out c r i v f 8c i v = d = d these two components constitute a large portion of the total output voltage ripple . in some applications, multiple capacitors have to be paralleled to achieve the desired esr value. if the output of the converter has to support an other load with high pulsating current, more capaci- tors are needed in order to reduce th e equivalent esr and s uppress the voltage ripple to a tolerable level. a small decoupling capacitor in parallel for bypassing the noise is also recommended, and the voltage rating of the output capacitors must also be considered. to support a load transient that is faster than the switching frequency, more capacitors have to be used to reduce the voltage excursion during load step change. another aspect of the capacitor selection is that the total ac current going through the capaci tors has to be less than the rated rms current specified on the ca- pacitors to prevent the capacitor from over-heating. ? ? ? ? ? + = gnd outi r r 1 0.75 v top p o w e r d i s s i p a t i o n o f t h e c o n v e r t e r . t h e m a x i m u m r i p p l e c u r r e n t o c c u r s a t t h e m a x i m u m i n p u t v o l t a g e . a g o o d s t a r t i n g p o i n t i s t o c h o o s e t h e r i p p l e c u r r e n t t o b e a p p r o x i m a t e l y 3 0 % o f t h e m a x i m u m o u t p u t c u r r e n t . o n c e t h e i n d u c t a n c e v a l u e h a s b e e n c h o s e n , s e l e c t i n g a n i n d u c t o r i s c a p a b l e o f c a r r y i n g t h e r e q u i r e d p e a k c u r - r e n t w i t h o u t g o i n g i n t o s a t u r a t i o n . i n s o m e t y p e s o f i n d u c t o r s , e s p e c i a l l y c o r e t h a t i s m a d e o f f e r r i t e , t h e r i p p l e c u r r e n t w i l l i n c r e a s e a b r u p t l y w h e n i t s a t u r a t e s . t h i s w i l l b e r e s u l t i n a l a r g e r o u t p u t r i p p l e v o l t a g e .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 4 a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) i n p u t c a p a c i t o r s e l e c t i o n t h e i n p u t c a p a c i t o r i s c h o s e n b a s e d o n t h e v o l t a g e r a t i n g a n d t h e r m s c u r r e n t r a t i n g . f o r r e l i a b l e o p e r a t i o n , s e l e c t t h e c a p a c i t o r v o l t a g e r a t i n g t o b e a t l e a s t 1 . 3 t i m e s h i g h e r t h a n t h e m a x i m u m i n p u t v o l t a g e . t h e m a x i m u m r m s c u r r e n t r a t i n g r e q u i r e m e n t i s a p p r o x i m a t e l y i o u t / 2 , w h e r e i o u t i s t h e l o a d c u r r e n t . d u r i n g p o w e r u p , t h e i n p u t c a p a c i - t o r s h a v e t o h a n d l e l a r g e a m o u n t o f s u r g e c u r r e n t . i n l o w - d u t y n o t e b o o k a p p l i a c t i o n s , c e r a m i c c a p a c i t o r s a r e r e m m e n d e d . t h e c a p a c i t o r s m u s t b e c o n n e c t e d b e t w e e n t h e d r a i n o f h i g h - s i d e m o s f e t a n d t h e s o u r c e o f l o w - s i d e m o s f e t w i t h v e r y l o w - i m p e a d a n c e p c b l a y o u t . m o s f e t s e l e c t i o n t h e a p p l i c a t i o n f o r a n o t e b o o k b a t t e r y w i t h a m a x i m u m v o l t a g e o f 2 4 v , a t l e a s t a m i n i m u m 3 0 v m o s f e t s s h o u l d b e u s e d . t h e d e s i g n h a s t o t r a d e o f f t h e g a t e c h a r g e w i t h t h e r ds(on) o f t h e m o s f e t : f o r t h e l o w - s i d e m o s f e t , b e f o r e i t i s t u r n e d o n , t h e b o d y d i o d e h a s b e e n c o n d u c t e d . t h e l o w - s i d e m o s f e t d r i v e r w i l l n o t c h a r g e t h e m i l l e r c a p a c i t o r o f t h i s m o s f e t . i n t h e t u r n i n g o f f p r o c e s s o f t h e l o w - s i d e m o s f e t , t h e l o a d c u r r e n t w i l l s h i f t t o t h e b o d y d i o d e f i r s t . t h e h i g h d v / d t o f t h e p h a s e n o d e v o l t a g e w i l l c h a r g e t h e m i l l e r c a p a c i t o r t h r o u g h t h e l o w - s i d e m o s f e t d r i v e r s i n k i n g c u r r e n t p a t h . t h i s r e s u l t s i n m u c h l e s s s w i t c h i n g l o s s o f t h e l o w - s i d e m o s f e t s . t h e d u t y c y c l e i s o f t e n v e r y s m a l l i n h i g h b a t t e r y v o l t a g e a p p l i c a t i o n s , a n d t h e l o w - s i d e m o s f e t w i l l c o n - d u c t m o s t o f t h e s w i t c h i n g c y c l e ; t h e r e f o r e , t h e r ds(on) o f t h e l o w - s i d e m o s f e t , t h e l e s s t h e p o w e r l o s s . t h e g a t e c h a r g e f o r t h i s m o s f e t i s u s u a l l y a s e c o n d a r y c o n s i d e r a t i o n . t h e h i g h - s i d e m o s f e t d o e s n o t h a v e t h i s z e r o v o l t a g e s w i t c h i n g c o n d i t i o n , a n d b e c a u s e i t c o n d u c t s f o r l e s s t i m e c o m p a r e d t o t h e l o w - s i d e m o s f e t , t h e s w i t c h i n g l o s s t e n d s t o b e d o m i n a n t . p r i o r i t y s h o u l d b e g i v e n t o t h e m o s f e t s w i t h l e s s g a t e c h a r g e , s o t h a t b o t h t h e g a t e d r i v e r l o s s a n d s w i t c h i n g l o s s w i l l b e m i n i m i z e d . l o s s e s i n t h e m o s f e t s h a v e t w o c o m p o n e n t s : c o n d u c - t i o n l o s s a n d t r a n s i t i o n l o s s . f o r t h e h i g h - s i d e a n d l o w - s i d e m o s f e t s , t h e l o s s e s a r e a p p r o x i m a t e l y g i v e n b y t h e f o l l o w i n g e q u a t i o n s : p high-side = i out 2 (1+ tc)(r ds(on) )d + (0.5)( i out )(v in )( t sw )f s w p low-side = i out 2 (1+ tc)(r ds(on) )(1-d) where i out is the load current tc is the temperature dependency of r ds(on) f sw is the switching frequency t sw is the switching interval d is the duty cycle note that both mosfets have conduction losses while the high- side mosfet include s an additional transi - tion loss. t he switching internal, t sw , is the function of the reverse transfer capacitance c rss . the (1+tc) term is to factor in the temperature dependency of the r ds(on) and can be extracted from the ?r ds(on) vs temperature? curve of the power mosfet.. l a y o u t c o n s i d e r a t i o n i n a n y h i g h s w i t c h i n g f r e q u e n c y c o n v e r t e r , a c o r r e c t l a y o u t i s i m p o r t a n t t o e n s u r e p r o p e r o p e r a t i o n o f t h e r e g u l a t o r . w i t h p o w e r d e v i c e s s w i t c h i n g a t h i g h e r f r e q u e n c y , t h e r e s u l t i n g c u r r e n t t r a n s i e n t w i l l c a u s e v o l t a g e s p i k e a c r o s s t h e i n t e r c o n n e c t i n g i m p e d a n c e a n d p a r a s i t i c c i r c u i t e l e m e n t s . a s a n e x a m p l e , c o n s i d e r t h e t u r n - o f f t r a n s i t i o n o f t h e p w m m o s f e t . b e f o r e t u r n - o f f c o n d i t i o n , t h e m o s f e t i s c a r r y i n g t h e f u l l l o a d c u r r e n t . d u r i n g t u r n - o f f , c u r r e n t s t o p s f l o w i n g i n t h e m o s f e t a n d i s f r e e w h e e l i n g b y t h e l o w e r m o s f e t a n d p a r a s i t i c d i o d e . a n y p a r a s i t i c i n d u c t a n c e o f t h e c i r c u i t g e n e r a t e s a l a r g e v o l t a g e s p i k e d u r i n g t h e s w i t c h i n g i n t e r v a l . i n g e n e r a l , u s i n g s h o r t a n d w i d e p r i n t e d c i r c u i t t r a c e s s h o u l d m i n i m i z e i n t e r c o n n e c t - i n g i m p e d a n c e s a n d t h e m a g n i t u d e o f v o l t a g e s p i k e . a n d s i g n a l a n d p o w e r g r o u n d s a r e t o b e k e p t s e p a r a t i n g a n d f i n a l l y c o m b i n e d t o u s e t h e g r o u n d p l a n e c o n s t r u c t i o n o r s i n g l e p o i n t g r o u n d i n g . t h e b e s t t i e - p o i n t b e t w e e n t h e s i g n a l g r o u n d a n d t h e p o w e r g r o u n d i s a t t h e n e g a t i v e s i d e o f t h e o u t p u t c a p a c i t o r o n e a c h c h a n n e l , w h e r e t h e r e i s l e s s n o i s e . n o i s y t r a c e s b e n e a t h t h e i c a r e n o t r e c o m m e n d e d . b e l o w i s a c h e c k l i s t f o r y o u r l a y o u t : t h e s e l e c t i o n o f t h e n - c h a n n e l p o w e r m o s f e t s a r e d e - t e r m i n e d b y t h e r ds(on) , r e v e r s i n g t r a n s f e r c a p a c i t a n c e ( c r s s ) a n d m a x i m u m o u t p u t c u r r e n t r e q u i r e m e n t . t h e
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 5 l a y o u t c o n s i d e r a t i o n ( c o n t . ) a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) k e e p t h e s w i t c h i n g n o d e s ( u g a t e , l g a t e , b o o t , a n d p h a s e ) a w a y f r o m s e n s i t i v e s m a l l s i g n a l n o d e s ( v d d q s e t , v t t r e f , c s , a n d m o d e ) s i n c e t h e s e n o d e s a r e f a s t m o v i n g s i g n a l s . t h e r e f o r e , k e e p t r a c e s t o t h e s e n o d e s a s s h o r t a s p o s s i b l e a n d t h e r e s h o u l d b e n o o t h e r w e a k s i g n a l t r a c e s i n p a r a l l e l w i t h t h e s e s t r a c e s o n a n y l a y e r . t h e s i g n a l s g o i n g t h r o u g h t h e s e s t r a c e s h a v e b o t h h i g h d v / d t a n d h i g h d i / d t , w i t h h i g h p e a k c h a r g i n g a n d d i s c h a r g i n g c u r r e n t . t h e t r a c e s f r o m t h e g a t e d r i v e r s t o t h e m o s f e t s ( u g a t e a n d l g a t e ) s h o u l d b e s h o r t a n d w i d e . p l a c e t h e s o u r c e o f t h e h i g h - s i d e m o s f e t a n d t h e d r a i n o f t h e l o w - s i d e m o s f e t a s c l o s e a s p o s s i b l e . m i n i - m i z i n g t h e i m p e d a n c e w i t h w i d e l a y o u t p l a n e b e t w e e n t h e t w o p a d s r e d u c e s t h e v o l t a g e b o u n c e o f t h e n o d e . d e c o u p l i n g c a p a c i t o r , t h e r e s i s t o r d i v i d e r s , b o o t c a p a c i t o r s , a n d c u r r e n t l i m i t s t e t t i n g r e s i s t o r s h o u l d b e c l o s e t h e i r p i n s . ( f o r e x a m p l e , p l a c e t h e d e c o u p l i n g c e r a m i c c a p a c i t o r n e a r t h e d r a i n o f t h e h i g h - s i d e m o s f e t a s c l o s e a s p o s s i b l e . t h e b u l k c a p a c i t o r s a r e a l s o p l a c e d n e a r t h e d r a i n ) . t h e i n p u t c a p a c i t o r s h o u l d b e n e a r t h e d r a i n o f t h e u p p e r m o s f e t ; t h e h i g h q u a l i t y c e r a m i c d e c o u p l i n g c a - p a c i t o r c a n b e p u t c l o s e t o t h e v c c a n d g n d p i n s ; t h e v t t r e f d e c o u p l i n g c a p a s i t o r s h o u l d b e c l o s e t o t h e v t t r e f p i n a n d g n d ; t h e v d d q a n d v t t o u t p u t c a - p a c i t o r s s h o u l d b e l o c a t e d r i g h t a c r o s s t h e i r o u t p u t p i n a s c l a s e a s p o s s i b l e t o t h e p a r t t o m i n i m i z e p a r a s i t i c s . t h e i n p u t c a p a c i t o r g n d s h o u l d b e c l o s e t o t h e o u t p u t c a p a c i t o r g n d a n d t h e l o w e r m o s f e t g n d . t h e d r a i n o f t h e m o s f e t s ( v i n a n d p h a s e n o d e s ) s h o u l d b e a l a r g e p l a n e f o r h e a t s i n k i n g . a n d p h a s e p i n t r a c e s a r e a l s o t h e r e t u r n p a t h f o r u g a t e . c o n n e c t t h i s p i n t o t h e c o n v e r t e r ? s u p p e r m o s f e t s o u r c e . t h e a p w 8 8 1 3 / a u s e d r i p p l e m o d e c o n t r o l . b u i l d t h e r e s i s t o r d i v i d e r c l o s e t o t h e v d d q s e t p i n s o t h a t t h e h i g h i m p e d a n c e t r a c e i s s h o r t e r w h e n t h e o u t p u t v o l t - a g e i s i n a d j u s t a b l e m o d e . a n d t h e v d d q s e t p i n t r a c e s c a n ? t b e c l o s e d t o t h e s w i t c h i n g s i g n a l t r a c e s ( u g a t e , l g a t e , b o o t , a n d p h a s e ) . t h e p g n d t r a c e s h o u l d b e a s e p a r a t e t r a c e , a n d i n d e p e n d e n t l y g o t o t h e s o u r c e o f t h e l o w - s i d e m o s f e t s f o r c u r r e n t l i m i t a c c u r a c y . t q f n 4 x 4 - 2 4 a f i g u r e 3 . r e c o m m e n e d m i n i m u m f o o t p r i n t 0 . 4 mm 0 . 2 mm 0 . 5 mm 3 mm * just recommend 0 . 5 mm * 3 mm 1 . 6 6 m m 1 . 66 mm 0 . 17 mm t q f n 3 x 3 - 2 0 0 . 5 mm 0 . 25 mm 0 . 46 mm 4 mm * just recommend 0 . 5 mm * 4 mm 2 . 2 5 m m 2 . 25 mm 0 . 4 mm thermalvia diameter 0 . 3 mm x 4
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 6 p a c k a g e i n f o r m a t i o n t q f n 4 x 4 - 2 4 a pin 1 d e pin 1 corner d 2 e 2 k l e s y m b o l min . max . 0 . 80 0 . 00 0 . 18 0 . 30 2 . 00 2 . 50 0 . 05 2 . 00 a a 1 b d d 2 e e 2 e l millimeters a 3 0 . 20 ref tqfn 4 x 4 - 24 a 0 . 35 0 . 45 2 . 50 0 . 008 ref min . max . inches 0 . 032 0 . 000 0 . 007 0 . 012 0 . 079 0 . 098 0 . 079 0 . 014 0 . 018 0 . 70 0 . 098 0 . 028 0 . 002 0 . 50 bsc 0 . 020 bsc k 0 . 20 0 . 008 3 . 90 4 . 10 0 . 154 0 . 161 3 . 90 4 . 10 0 . 154 0 . 161 a b a 1 a 3 nx c aaa aaa 0 . 08 0 . 003
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 7 p a c k a g e i n f o r m a t i o n t q f n 3 x 3 - 2 0 pin 1 d e pin 1 corner d 2 e 2 k l e s y m b o l min . max . 0 . 80 0 . 00 0 . 15 0 . 25 1 . 50 1 . 80 0 . 05 1 . 50 a a 1 b d d 2 e e 2 e l millimeters a 3 0 . 20 ref tqfn 3 x 3 - 20 0 . 30 0 . 50 1 . 80 0 . 008 ref min . max . inches 0 . 031 0 . 000 0 . 006 0 . 010 0 . 059 0 . 071 0 . 059 0 . 012 0 . 020 0 . 70 0 . 071 0 . 028 0 . 002 0 . 40 bsc 0 . 016 bsc k 0 . 20 0 . 008 2 . 90 3 . 10 0 . 114 0 . 122 2 . 90 3 . 10 0 . 114 0 . 122 note : 1 . followed from jedec mo - 220 weee a b a 1 a 3 nx aaa c aaa 0 . 08 0 . 003
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 8 application a h t1 c d d w e1 f 330.0 ? 2.00 50 min. 12.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 12.0 ? 0.30 1.75 ? 0.10 5.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tqfn4x4 - 24a 4.0 ? 0.10 8.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0.40 4.30 ? 0.20 4.30 ? 0 .20 1.25 ? 0.20 application a h t1 c d d w e1 f 330 ? 2.00 50 min. 12.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 12.0 ? 0.30 1.75 ? 0.10 5.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tqfn3x3 - 20 4.0 ? 0.10 8.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0.40 3.30 ? 0.20 3.30 ? 0.20 1.30 ? 0.20 (mm) d e v i c e s p e r u n i t c a r r i e r t a p e & r e e l d i m e n s i o n s package type unit quantity tqfn4x4 - 24a tape & reel 3000 tqfn3x3 - 20 tape & reel 3000 a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1 h t1 a d
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 2 9 t a p i n g d i r e c t i o n i n f o r m a t i o n t q f n 4 x 4 - 2 4 a t q f n 3 x 3 - 2 0 user direction of feed user direction of feed
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 3 0 c l a s s i f i c a t i o n p r o f i l e c l a s s i f i c a t i o n r e f l o w p r o f i l e s profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spec ified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined a s a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 6 - s e p . , 2 0 1 2 a p w 8 8 1 3 / a w w w . a n p e c . c o m . t w 3 1 c l a s s i f i c a t i o n r e f l o w p r o f i l e s table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ t j =125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a1 15 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma r e l i a b i l i t y t e s t p r o g r a m c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8

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